1. Technical Field of the Invention
This invention relates generally to integrated circuit packaging and more particularly to wafer level packaging.
2. Description of Related Art
The manufacture, packaging, and use of integrated circuits is generally known. A manufacturing process within a fabricating facility is used to form a unit number of integrated circuits on a single semiconductive substrate. After formation, the semiconductive substrate is divided into the unit number of integrated circuits, i.e., dies. The dies are then packaged. The package provides protection for the integrated circuit die and provides electrical connections between the integrated circuits formed on the die and package pads. The packaged dies are then usually mounted upon printed circuit boards (PCBs) and installed into host devices. The PCBs include conductors that communicatively couple the circuits of the integrated circuit with circuits of other integrated circuits, with PCB connectors, and with user interface devices, etc.
As manufacturing process dimensions continue to decrease, larger numbers of circuits are formed on ever-smaller dies. In order to reduce the overall size of the PCBs upon which the packaged dies are mounted, packages having reduced dimensions have been developed. One type of integrated circuit package is referred to as a “wafer-level package. With a wafer-level package, the size of the package is substantially the same as the size of the die contained within. In one particular type of wafer-level package, package surface located package signal connections, e.g., bumps or balls, of the wafer-level package serve as the electrical interface between the electrical connections of the package and the PCB upon which it mounts. While such wafer-level packaging provides significant advantages with regard to size and power consumption, the package often fails to provide sufficient isolation to the circuitry contained on the die. Thus, a need exists for wafer-level packaging that satisfies the circuit requirements of the integrated circuits formed on the die.